[PATCH v2 4/5] clk: mediatek: mt8183: Add CLK_VDEC_ACTIVE to vdec
From: Nícolas F. R. A. Prado <hidden>
Date: 2023-06-07 20:58:06
Also in:
linux-clk, linux-devicetree, linux-mediatek, lkml
Subsystem:
common clk framework, open firmware and flattened device tree bindings, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Add the CLK_VDEC_ACTIVE clock to the vdec clock driver. This clock is enabled by the VPU once it starts decoding. Signed-off-by: Nícolas F. R. A. Prado <redacted> --- Changes in v2: - Added CLK_IGNORE_UNUSED flag drivers/clk/mediatek/clk-mt8183-vdec.c | 5 +++++ include/dt-bindings/clock/mt8183-clk.h | 3 ++- 2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt8183-vdec.c b/drivers/clk/mediatek/clk-mt8183-vdec.c
index 513b7956cbea..03c4f1acfdb8 100644
--- a/drivers/clk/mediatek/clk-mt8183-vdec.c
+++ b/drivers/clk/mediatek/clk-mt8183-vdec.c@@ -27,6 +27,10 @@ static const struct mtk_gate_regs vdec1_cg_regs = { GATE_MTK(_id, _name, _parent, &vdec0_cg_regs, _shift, \ &mtk_clk_gate_ops_setclr_inv) +#define GATE_VDEC0(_id, _name, _parent, _shift) \ + GATE_MTK_FLAGS(_id, _name, _parent, &vdec0_cg_regs, _shift, \ + &mtk_clk_gate_ops_setclr, CLK_IGNORE_UNUSED) + #define GATE_VDEC1_I(_id, _name, _parent, _shift) \ GATE_MTK(_id, _name, _parent, &vdec1_cg_regs, _shift, \ &mtk_clk_gate_ops_setclr_inv)
@@ -34,6 +38,7 @@ static const struct mtk_gate_regs vdec1_cg_regs = { static const struct mtk_gate vdec_clks[] = { /* VDEC0 */ GATE_VDEC0_I(CLK_VDEC_VDEC, "vdec_vdec", "mm_sel", 0), + GATE_VDEC0(CLK_VDEC_ACTIVE, "vdec_active", "mm_sel", 4), /* VDEC1 */ GATE_VDEC1_I(CLK_VDEC_LARB1, "vdec_larb1", "mm_sel", 0), };
diff --git a/include/dt-bindings/clock/mt8183-clk.h b/include/dt-bindings/clock/mt8183-clk.h
index a7b470b0ec8a..32dd7d91dbe2 100644
--- a/include/dt-bindings/clock/mt8183-clk.h
+++ b/include/dt-bindings/clock/mt8183-clk.h@@ -357,7 +357,8 @@ /* VDEC_GCON */ #define CLK_VDEC_VDEC 0 #define CLK_VDEC_LARB1 1 -#define CLK_VDEC_NR_CLK 2 +#define CLK_VDEC_ACTIVE 2 +#define CLK_VDEC_NR_CLK 3 /* VENC_GCON */ #define CLK_VENC_LARB 0
--
2.41.0
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