Re: [PATCH v4 4/6] KVM: arm64: Use per guest ID register for ID_AA64DFR0_EL1.PMUVer

Hi Marc,

On Mon, Mar 27, 2023 at 3:40 AM Marc Zyngier [off-list ref] wrote:

On Fri, 17 Mar 2023 05:06:35 +0000,
Jing Zhang [off-list ref] wrote:

quoted

With per guest ID registers, PMUver settings from userspace
can be stored in its corresponding ID register.

No functional change intended.

Signed-off-by: Jing Zhang <redacted>
---
 arch/arm64/include/asm/kvm_host.h | 11 +++---
 arch/arm64/kvm/arm.c              |  6 ---
 arch/arm64/kvm/id_regs.c          | 61 +++++++++++++++++++++++++------
 include/kvm/arm_pmu.h             |  5 ++-
 4 files changed, 59 insertions(+), 24 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index e926ea91a73c..102860ba896d 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h

@@ -218,6 +218,12 @@ struct kvm_arch {
 #define KVM_ARCH_FLAG_EL1_32BIT                              4
      /* PSCI SYSTEM_SUSPEND enabled for the guest */
 #define KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED         5
+     /*
+      * AA64DFR0_EL1.PMUver was set as ID_AA64DFR0_EL1_PMUVer_IMP_DEF
+      * or DFR0_EL1.PerfMon was set as ID_DFR0_EL1_PerfMon_IMPDEF from
+      * userspace for VCPUs without PMU.
+      */
+#define KVM_ARCH_FLAG_VCPU_HAS_IMP_DEF_PMU           6

      unsigned long flags;

@@ -230,11 +236,6 @@ struct kvm_arch {

      cpumask_var_t supported_cpus;

-     struct {
-             u8 imp:4;
-             u8 unimp:4;
-     } dfr0_pmuver;
-
      /* Hypercall features firmware registers' descriptor */
      struct kvm_smccc_features smccc_feat;

diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index c78d68d011cb..fb2de2cb98cb 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c

@@ -138,12 +138,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
      kvm_arm_set_default_id_regs(kvm);
      kvm_arm_init_hypercalls(kvm);

-     /*
-      * Initialise the default PMUver before there is a chance to
-      * create an actual PMU.
-      */
-     kvm->arch.dfr0_pmuver.imp = kvm_arm_pmu_get_pmuver_limit();
-
      return 0;

 err_free_cpumask:

diff --git a/arch/arm64/kvm/id_regs.c b/arch/arm64/kvm/id_regs.c
index b60ca1058301..3a87a3d2390d 100644
--- a/arch/arm64/kvm/id_regs.c
+++ b/arch/arm64/kvm/id_regs.c

@@ -21,9 +21,12 @@
 static u8 vcpu_pmuver(const struct kvm_vcpu *vcpu)
 {
      if (kvm_vcpu_has_pmu(vcpu))
-             return vcpu->kvm->arch.dfr0_pmuver.imp;
-
-     return vcpu->kvm->arch.dfr0_pmuver.unimp;
+             return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer),
+                             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)]);
+     else if (test_bit(KVM_ARCH_FLAG_VCPU_HAS_IMP_DEF_PMU, &vcpu->kvm->arch.flags))
+             return ID_AA64DFR0_EL1_PMUVer_IMP_DEF;
+     else
+             return 0;

Drop the pointless elses.

Will do.

quoted

 }

 static u8 perfmon_to_pmuver(u8 perfmon)

@@ -256,10 +259,23 @@ static int set_id_aa64dfr0_el1(struct kvm_vcpu *vcpu,
      if (val)
              return -EINVAL;

-     if (valid_pmu)
-             vcpu->kvm->arch.dfr0_pmuver.imp = pmuver;
-     else
-             vcpu->kvm->arch.dfr0_pmuver.unimp = pmuver;
+     if (valid_pmu) {
+             mutex_lock(&vcpu->kvm->lock);

Bingo!

Will fix it.

quoted

+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] &=
+                     ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer);
+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] |=
+                     FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), pmuver);
+
+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_DFR0_EL1)] &=
+                     ~ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon);
+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_DFR0_EL1)] |= FIELD_PREP(
+                             ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon), pmuver_to_perfmon(pmuver));
+             mutex_unlock(&vcpu->kvm->lock);
+     } else if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF) {
+             set_bit(KVM_ARCH_FLAG_VCPU_HAS_IMP_DEF_PMU, &vcpu->kvm->arch.flags);
+     } else {
+             clear_bit(KVM_ARCH_FLAG_VCPU_HAS_IMP_DEF_PMU, &vcpu->kvm->arch.flags);
+     }

The last two cases are better written as:

        assign_bit(KVM_ARCH_FLAG_VCPU_HAS_IMP_DEF_PMU, &vcpu->kvm->arch.flags,
                   pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF);

Will do.

quoted

      return 0;
 }

@@ -296,10 +312,23 @@ static int set_id_dfr0_el1(struct kvm_vcpu *vcpu,
      if (val)
              return -EINVAL;

-     if (valid_pmu)
-             vcpu->kvm->arch.dfr0_pmuver.imp = perfmon_to_pmuver(perfmon);
-     else
-             vcpu->kvm->arch.dfr0_pmuver.unimp = perfmon_to_pmuver(perfmon);
+     if (valid_pmu) {
+             mutex_lock(&vcpu->kvm->lock);

Same here (lock inversion)

Will fix it.

quoted

+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_DFR0_EL1)] &=
+                     ~ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon);
+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_DFR0_EL1)] |= FIELD_PREP(
+                     ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon), perfmon);
+
+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] &=
+                     ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer);
+             vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] |= FIELD_PREP(
+                     ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), perfmon_to_pmuver(perfmon));
+             mutex_unlock(&vcpu->kvm->lock);
+     } else if (perfmon == ID_DFR0_EL1_PerfMon_IMPDEF) {
+             set_bit(KVM_ARCH_FLAG_VCPU_HAS_IMP_DEF_PMU, &vcpu->kvm->arch.flags);
+     } else {
+             clear_bit(KVM_ARCH_FLAG_VCPU_HAS_IMP_DEF_PMU, &vcpu->kvm->arch.flags);
+     }

Same here (assign_bit).

Will do.

quoted

      return 0;
 }

@@ -543,4 +572,14 @@ void kvm_arm_set_default_id_regs(struct kvm *kvm)
      }

      kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64PFR0_EL1)] = val;
+
+     /*
+      * Initialise the default PMUver before there is a chance to
+      * create an actual PMU.
+      */
+     kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] &=
+             ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer);
+     kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] |=
+             FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer),
+                        kvm_arm_pmu_get_pmuver_limit());

Please put these assignments on a single line...

Will do.

quoted

 }

diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h
index 628775334d5e..51c7f3e7bdde 100644
--- a/include/kvm/arm_pmu.h
+++ b/include/kvm/arm_pmu.h

@@ -92,8 +92,9 @@ void kvm_vcpu_pmu_restore_host(struct kvm_vcpu *vcpu);
 /*
  * Evaluates as true when emulating PMUv3p5, and false otherwise.
  */
-#define kvm_pmu_is_3p5(vcpu)                                         \
-     (vcpu->kvm->arch.dfr0_pmuver.imp >= ID_AA64DFR0_EL1_PMUVer_V3P5)
+#define kvm_pmu_is_3p5(vcpu)                                                                 \
+      (FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer),                                 \
+              vcpu->kvm->arch.id_regs[IDREG_IDX(SYS_ID_AA64DFR0_EL1)]) >= ID_AA64DFR0_EL1_PMUVer_V3P5)

I'll stop mentioning the need for accessors...

Will fix it.

Thanks,

        M.

--
Without deviation from the norm, progress is not possible.

Thanks,
Jing

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