Re: Similar SoCs with different CPUs and interrupt bindings
From: Krzysztof Kozlowski <hidden>
Date: 2022-09-21 10:17:46
Also in:
linux-devicetree, linux-renesas-soc, linux-riscv, lkml
From: Krzysztof Kozlowski <hidden>
Date: 2022-09-21 10:17:46
Also in:
linux-devicetree, linux-renesas-soc, linux-riscv, lkml
On 21/09/2022 12:14, Robin Murphy wrote:
quoted
+#define SOC_PERIPHERAL_IRQ_NUMBER(na) (na + 32) +#define SOC_PERIPHERAL_IRQ(nr, na) GIC_SPI nr SOC_PERIPHERAL_IRQ_NUMBER(na) / { compatible = "renesas,r9a07g043"; #address-cells = <2>;@@ -128,7 +130,7 @@ ssi1: ssi@1004a000 { compatible = "renesas,r9a07g043-ssi", "renesas,rz-ssi"; reg = <0 0x1004a000 0 0x400>; - interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + interrupts = <SOC_PERIPHERAL_IRQ(330, IRQ_TYPE_LEVEL_HIGH)>,Or any other method like that....Which will generate the text: "interrupts = <GIC_SPI 330 (IRQ_TYPE_LEVEL_HIGH + 32)>," (give or take some whitespace) CPP supports constant expressions in #if and #elif directives, but macros are purely literal text replacement. It might technically be achievable with some insane CPP metaprogramming, but for all practical purposes this is a non-starter unless dtc itself grows the ability to process arithmetic expressions.
Except I put it into flags, not to IRQ number, it works, so I am not sure why do you call it non-starter? Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel