-----Original Message-----
From: Philipp Zabel <p.zabel@pengutronix.de>
Sent: 2022年8月18日 16:51
To: Hongxing Zhu <hongxing.zhu@nxp.com>; l.stach@pengutronix.de;
bhelgaas@google.com; lorenzo.pieralisi@arm.com; robh@kernel.org;
shawnguo@kernel.org; vkoul@kernel.org; alexander.stein@ew.tq-group.com;
marex@denx.de
Cc: linux-phy@lists.infradead.org; devicetree@vger.kernel.org;
linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
[off-list ref]
Subject: Re: [PATCH v3 1/6] reset: imx7: Add the iMX8MP PCIe PHY PERST
support

Hi Richard,

On Do, 2022-08-18 at 15:02 +0800, Richard Zhu wrote:

quoted

On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST
bit(BIT3) of SRC_PCIEPHY_RCR is 1b'1.
But i.MX8MP has one inversed default value 1b'0 of PERST bit.

And the PERST bit should be kept 1b'1 after power and clocks are stable.
So add the i.MX8MP PCIe PHY PERST support here.

the description is good now. It would be nice if this could also be mentioned in
the Reference Manual.

Please replace "add" with "fix" in the subject, as I requested earlier:
"reset: imx7: Fix i.MX8MP PCIe PHY PERST support".

And add a fixes line:

Fixes: e08672c03981 ("reset: imx7: Add support for i.MX8MP SoC")

With those two changes,
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

Hi Philipp:
Okay, would be changed in next version.
Thanks for your review.

Best Regards
Richard Zhu

regards
Philipp

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