[PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: Add support for G1 and G2 on imx8mm
From: Adam Ford <hidden>
Date: 2021-12-16 11:13:47
Also in:
linux-devicetree, linux-media, linux-rockchip, linux-staging, lkml
Subsystem:
hantro vpu codec driver, media input infrastructure (v4l/dvb), open firmware and flattened device tree bindings, the rest · Maintainers:
Nicolas Dufresne, Benjamin Gaignard, Philipp Zabel, Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
The i.MX8M mini appears to have a similar G1 and G2 decoder but the post-procesing isn't present, so different compatible flags are requred. Since all the other parameters are the same with imx8mq, just add the new compatible flags to nxp,imx8mq-vpu.yaml. Signed-off-by: Adam Ford <redacted>
diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
index c1e157251de7..b1f24c48c73b 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml@@ -5,7 +5,7 @@ $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs maintainers: - Philipp Zabel <p.zabel@pengutronix.de>
@@ -20,6 +20,8 @@ properties: deprecated: true - const: nxp,imx8mq-vpu-g1 - const: nxp,imx8mq-vpu-g2 + - const: nxp,imx8mm-vpu-g1 + - const: nxp,imx8mm-vpu-g2 reg: maxItems: 1
@@ -66,3 +68,27 @@ examples: clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>; power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>; }; + - | + #include <dt-bindings/clock/imx8mm-clock.h> + #include <dt-bindings/power/imx8mm-power.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + vpu_g1: video-codec@38300000 { + compatible = "nxp,imx8mm-vpu-g1"; + reg = <0x38300000 0x10000>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>; + }; + - | + #include <dt-bindings/clock/imx8mm-clock.h> + #include <dt-bindings/power/imx8mm-power.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + vpu_g2: video-codec@38300000 { + compatible = "nxp,imx8mm-vpu-g2"; + reg = <0x38310000 0x10000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>; + power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>; + };
--
2.32.0
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