Re: [PATCH] arm64: dts: imx8m: add syscon node for display_blk_ctrl module regs

On Mon, Nov 01, 2021 at 11:22:21PM -0500, Adam Ford wrote:

On Mon, Nov 1, 2021 at 5:58 PM Tommaso Merciai [off-list ref] wrote:

quoted

On Mon, Nov 01, 2021 at 11:35:49PM +0100, Ahmad Fatoum wrote:

quoted

Hello Tommaso,

On 01.11.21 23:28, Tommaso Merciai wrote:

quoted

Add system controller node for registers of module Display Block Control
(DISPLAY_BLK_CTRL, base address: 0x32e28000).
The DISPLAY_BLK_CTRL module contains general purpose registers (GPRs),
which control varied features of the associated peripherals.
Reference: IMX8MMRM Rev. 3, 11/2020, p 3897
---
 arch/arm64/boot/dts/freescale/imx8mm.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 2f632e8ca388..3e496b457e1a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi

@@ -961,6 +961,11 @@ aips4: bus@32c00000 {
                    #size-cells = <1>;
                    ranges = <0x32c00000 0x32c00000 0x400000>;

+                   dispmix_gpr: display-gpr@32e28000 {
+                           compatible = "fsl, imx8mm-iomuxc-gpr", "syscon";

Please read vendor patches before submitting them. The space
is out-of-place in the compatible and the compatible is wrong:
This doesn't look like a i.MX8MM pin controller.

Cheers,
Ahmad

  Hi Ahmad,
  Thanks for your review. Do you think this is correct?

  compatible = "fsl,imx8mm-dispmix-gpr", "syscon";

  Let me know.

There was already a driver created for the blk-ctrl stuff and it has a
device tree binding at 32e28000.  It's tied into the power-domain
system, so if you want to enable the csi, dsi, or lcd, etc. you can
just reference the blt-ctrl power domain index, and it enables the
device's gpc power domain and takes the corresponding device out of
reset.

  Hi Adam,
  You mean using the gpcv2.c driver?
  
  drivers/soc/imx/gpcv2.c

  With the following node, to put out of reset eLCDIF and mipi_dsi:

  gpc: gpc@303a0000 {
	compatible = "fsl,imx8mm-gpc";
	reg = <0x303a0000 0x10000>;
	interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-parent = <&gic>;
	interrupt-controller;
	#interrupt-cells = <3>;

	pgc {

	 #address-cells = <1>;
	 #size-cells = <0>;
	 pgc_mipi: power-domain@0 {
					#power-domain-cells = <0>;
					reg = <IMX8M_POWER_DOMAIN_MIPI>;
 				  };

	pgc_disp: power-domain@7 {
					#power-domain-cells = <0>;
					reg = <IMX8M_POWER_DOMAIN_DISP>;
 				 };
   };
  };

  Let me know.

  Thanks,
  Tommaso

adam

quoted

  Thanks,
  Tommaso

quoted

quoted

+                           reg = <0x32e28000 0x100>;
+                   };
+
                    usbotg1: usb@32e40000 {
                            compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb";
                            reg = <0x32e40000 0x200>;

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