The current irq_handler macro uses a literal load followed by an
explicit assignment of lr before an indirect call, both of which are
sub-optimal on recent ARM cores. Replace it by a mov_l call, which will
evaluate to a movw/movt pair on v7 cores, avoiding one of the two loads,
followed by a call to a newly introduced 'bl_m' macro, which will
evaluate to a blx instruction on cores that support it. (Setting lr
explicitly rather than via a bl or blx instruction confuses the return
address prediction that modern out-of-order cores use to speculatively
perform the function return.)

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
---
 arch/arm/kernel/entry-armv.S | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index a54b5044d406..21896f702447 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S

@@ -38,14 +38,12 @@
  */
 	.macro	irq_handler
 #ifdef CONFIG_GENERIC_IRQ_MULTI_HANDLER
-	ldr	r1, =handle_arch_irq
+	mov_l	r1, handle_arch_irq
 	mov	r0, sp
-	badr	lr, 9997f
-	ldr	pc, [r1]
+	bl_m	[r1]
 #else
 	arch_irq_handler_default
 #endif
-9997:
 	.endm
 
 	.macro	pabt_helper

-- 
2.30.2


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