On Tue, Aug 24, 2021 at 11:49:01AM +0100, Catalin Marinas wrote:
On Thu, Aug 12, 2021 at 08:02:13PM +0100, Marc Zyngier wrote:
quoted
It is amazing that we never documented this absolutely basic
requirement: if you boot the kernel at EL2, you'd better
enable the HVC instruction from EL3.
Really, just do it.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
Documentation/arm64/booting.rst | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst
index a9192e7a231b..6c729d0c4bc2 100644
--- a/Documentation/arm64/booting.rst
+++ b/Documentation/arm64/booting.rst
@@ -212,6 +212,11 @@ Before jumping into the kernel, the following conditions must be met:
- The value of SCR_EL3.FIQ must be the same as the one present at boot
time whenever the kernel is executing.
+ For all systems:
+ - If EL3 is present and the kernel is entered at EL2:
+
+ - SCR_EL3.HCE (bit 8) must be initialised to 0b1.
+
For systems with a GICv3 interrupt controller to be used in v3 mode:
- If EL3 is present:
I'll queue this patch only for now.
A nitpick, I think we should move "For all systems" and "If EL3 is
present..." above the lines describing the SCR_EL3.FIQ requirement (I
can make the change locally).
FWIW, with that:
Acked-by: Mark Rutland <mark.rutland@arm.com>
Mark.
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