Re: [PATCH v1 7/7] ARM: dts: colibri-imx6ull-emmc: add device trees
From: Marcel Ziswiler <hidden>
Date: 2021-08-19 16:24:44
Also in:
linux-devicetree, lkml
On Thu, 2021-08-19 at 16:03 +0200, Marcel Ziswiler wrote:
quoted hunk ↗ jump to hunk
From: Max Krummenacher <redacted> Add devices trees for a Colibri iMX6ULL 1GB which has a eMMC instead of the raw NAND used on other SKUs. Related-to: ELB-4056, ELB-4058 Signed-off-by: Max Krummenacher <redacted> Signed-off-by: Marcel Ziswiler <redacted> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/imx6ull-colibri-emmc-eval-v3.dts | 17 ++ .../dts/imx6ull-colibri-emmc-nonwifi.dtsi | 185 ++++++++++++++++++ arch/arm/boot/dts/imx6ull-colibri.dtsi | 30 ++- 4 files changed, 232 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-eval-v3.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi ...diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx6ull-colibri.dtsi index 0cdbf7b6e7285..f432fc0a6a530 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi@@ -1,6 +1,6 @@// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* - * Copyright 2018 Toradex AG + * Copyright 2018-2021 Toradex AG */ #include "imx6ull.dtsi"@@ -345,6 +345,19 @@ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */>; }; + /* + * With an eMMC instead of a raw NAND device the following pins + * are available at SODIMM pins + */ + pinctrl_gpmi_gpio: gpmi-gpio-grp { + fsl,pins = < + MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10b0 /* SODIMM 140 */ + MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x10b0 /* SODIMM 144 */ + MX6UL_PAD_NAND_CLE__GPIO4_IO15 0x10b0 /* SODIMM 146 */ + MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x10b0 /* SODIMM 142 */ + >; + }; +
Just noticed that I somehow messed up the indentation above with one spurious tab too much. Will correct that in a v2. Sorry about that.
quoted hunk ↗ jump to hunk
pinctrl_gpmi_nand: gpmi-nand-grp { fsl,pins = < MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9@@ -533,6 +546,21 @@ MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10>; }; + pinctrl_usdhc2emmc: usdhc2emmcgrp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 + >; + }; +
Ditto above.
pinctrl_wdog: wdog-grp {
fsl,pins = <
MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0Cheers Marcel _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel