RE: [PATCH v2 1/1] arm64: dts: lx2160a: Fix the compatible string of LX2160A UART
From: Leo Li <hidden>
Date: 2021-08-09 22:52:09
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linux-devicetree, lkml
-----Original Message----- From: Zhen Lei <redacted> Sent: Tuesday, June 15, 2021 8:16 AM To: Shawn Guo <shawnguo@kernel.org>; Leo Li <redacted>; Rob Herring [off-list ref]; Mark Kettenis [off-list ref]; devicetree [off-list ref]; linux-arm-kernel <linux-arm- kernel@lists.infradead.org>; linux-kernel [off-list ref] Cc: Zhen Lei <redacted> Subject: [PATCH v2 1/1] arm64: dts: lx2160a: Fix the compatible string of LX2160A UART Mark Kettenis told us that: According to the NXP documentation, the LX2160A has a real PL011 UART. Therefore, rewrite it to the compatible string of pl011. The property "current- speed" specific to "arm,sbsa-uart" is also deleted.
Sorry that I missed the discussion on the v1. But looks like this change breaks the LX2160 boot. The AMBA matching doesn't seem to work. And the console is not registered correctly. [ 0.639055] OF: amba_device_add() failed (-2) for /soc/serial@21c0000 [ 0.645612] OF: amba_device_add() failed (-2) for /soc/serial@21d0000
quoted hunk ↗ jump to hunk
Suggested-by: Shawn Guo <shawnguo@kernel.org> Suggested-by: Mark Kettenis <redacted> Signed-off-by: Zhen Lei <redacted> --- arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-)diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsib/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index c4b1a59ba424..d2e6f7285674 100644--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi@@ -920,34 +920,30 @@ QORIQ_CLK_PLL_DIV(8)>, }; uart0: serial@21c0000 { - compatible = "arm,sbsa-uart","arm,pl011"; + compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x21c0000 0x0 0x1000>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - current-speed = <115200>; status = "disabled"; }; uart1: serial@21d0000 { - compatible = "arm,sbsa-uart","arm,pl011"; + compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x21d0000 0x0 0x1000>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - current-speed = <115200>; status = "disabled"; }; uart2: serial@21e0000 { - compatible = "arm,sbsa-uart","arm,pl011"; + compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x21e0000 0x0 0x1000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; - current-speed = <115200>; status = "disabled"; }; uart3: serial@21f0000 { - compatible = "arm,sbsa-uart","arm,pl011"; + compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0x21f0000 0x0 0x1000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - current-speed = <115200>; status = "disabled"; }; --2.25.1
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