Thread (13 messages) flat view 13 messages, 3 authors, 2021-09-22

Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

From: Oleksij Rempel <o.rempel@pengutronix.de>
Date: 2021-07-17 05:03:00

On Fri, Jul 16, 2021 at 10:36:56AM -0300, Fabio Estevam wrote:
The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
    
[    4.854337] m25p80@0 enforce active low on chipselect handle
   
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
    
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Thank you!
quoted hunk ↗ jump to hunk
---
 arch/arm/boot/dts/imx6dl-alti6p.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx6dl-alti6p.dts b/arch/arm/boot/dts/imx6dl-alti6p.dts
index 4329b372d8cb..e8325fd680d9 100644
--- a/arch/arm/boot/dts/imx6dl-alti6p.dts
+++ b/arch/arm/boot/dts/imx6dl-alti6p.dts
@@ -192,7 +192,7 @@ &can1 {
 };
 
 &ecspi1 {
-	cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi1>;
 	status = "okay";
-- 
2.25.1
-- 
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