On Thu, 18 Mar 2021 09:20:35 +0100, Benjamin Gaignard wrote:
Introducing G2 hevc video decoder lead to modify the bindings to allow
to get one node per VPUs.
VPUs share one hardware control block which is provided as a phandle on
an syscon.
Each node got now one reg and one interrupt.
Add a compatible for G2 hardware block: nxp,imx8mq-vpu-g2.
To be compatible with older DT the driver is still capable to use 'ctrl'
reg-name even if it is deprecated now.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
---
version 5:
- This version doesn't break the backward compatibilty between kernel
and DT.
.../bindings/media/nxp,imx8mq-vpu.yaml | 53 ++++++++++++-------
1 file changed, 34 insertions(+), 19 deletions(-)
Reviewed-by: Rob Herring <robh@kernel.org>
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