Hi Bartosz,

Thanks for you review.

On Fri, Jan 22 2021, Bartosz Golaszewski wrote:

On Mon, Jan 11, 2021 at 12:47 PM Baruch Siach [off-list ref] wrote:

quoted

Use the marvell,pwm-offset DT property to store the location of PWM
signal duration registers.

Since we have more than two GPIO chips per system, we can't use the
alias id to differentiate between them. Use the offset value for that.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>

[...]

quoted

+       regmap_write(mvchip->regs,
+                    GPIO_BLINK_CNT_SELECT_OFF + mvchip->offset, set);

Can you confirm that this line is on purpose and that it should be
executed even for chips that use a separate regmap for PWM?

Yes. The blink counter selection register is at the same offset is all
chips that support the GPIO blink feature. Only the on/off registers
offset is different.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -

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