From: Matthias Brugger <mbrugger@suse.com>

For some power domains like vpu_core on MT8183 whose sram need to do clock
and internal isolation while power on/off sram. We add a cap
"MTK_SCPD_SRAM_ISO" to judge if we need to do the extra sram isolation
control or not.

Signed-off-by: Weiyi Lu <redacted>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <redacted>
---

  drivers/soc/mediatek/mtk-pm-domains.c | 22 ++++++++++++++++++++--
  1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 3aa430a60602..0802eccc3a0b 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c

@@ -21,6 +21,7 @@
  
  #define MTK_SCPD_ACTIVE_WAKEUP		BIT(0)
  #define MTK_SCPD_FWAIT_SRAM		BIT(1)
+#define MTK_SCPD_SRAM_ISO		BIT(2)
  #define MTK_SCPD_CAPS(_scpd, _x)	((_scpd)->data->caps & (_x))
  
  #define SPM_VDE_PWR_CON			0x0210

@@ -42,6 +43,8 @@
  #define PWR_ON_BIT			BIT(2)
  #define PWR_ON_2ND_BIT			BIT(3)
  #define PWR_CLK_DIS_BIT			BIT(4)
+#define PWR_SRAM_CLKISO_BIT		BIT(5)
+#define PWR_SRAM_ISOINT_B_BIT		BIT(6)
  
  #define PWR_STATUS_DISP			BIT(3)
  #define PWR_STATUS_MFG			BIT(4)

@@ -162,6 +165,14 @@ static int scpsys_sram_enable(struct scpsys_domain *pd, void __iomem *ctl_addr)
  	if (ret < 0)
  		return ret;
  
+	if (MTK_SCPD_CAPS(pd, MTK_SCPD_SRAM_ISO))	{
+		val = readl(ctl_addr) | PWR_SRAM_ISOINT_B_BIT;
+		writel(val, ctl_addr);
+		udelay(1);
+		val &= ~PWR_SRAM_CLKISO_BIT;
+		writel(val, ctl_addr);
+	}
+
  	return 0;
  }
  

@@ -171,8 +182,15 @@ static int scpsys_sram_disable(struct scpsys_domain *pd, void __iomem *ctl_addr)
  	u32 val;
  	int tmp;
  
-	val = readl(ctl_addr);
-	val |= pd->data->sram_pdn_bits;
+	if (MTK_SCPD_CAPS(pd, MTK_SCPD_SRAM_ISO))	{
+		val = readl(ctl_addr) | PWR_SRAM_CLKISO_BIT;
+		writel(val, ctl_addr);
+		val &= ~PWR_SRAM_ISOINT_B_BIT;
+		writel(val, ctl_addr);
+		udelay(1);
+	}
+
+	val = readl(ctl_addr) | pd->data->sram_pdn_bits;