[RFC PATCH 2/2] arm64: dts: imx8mm: Describe the ENET pps interrupt
From: Fabio Estevam <festevam@gmail.com>
Date: 2020-08-18 21:07:05
Subsystem:
arm/freescale imx / mxc / layerscape arm architecture, the rest · Maintainers:
Frank Li, Sascha Hauer, Linus Torvalds
imx8mm has IRQ 121 associated with the '1588 Timer Interrupt', so add an entry for it. With this change IRQ 121 can properly increment when PTP applications like ptp4l is used. Suggested-by: Rogerio Nunes <redacted> Signed-off-by: Fabio Estevam <festevam@gmail.com> --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index 551afc270fb7..6f435628824c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi@@ -844,10 +844,11 @@ fec1: ethernet@30be0000 { compatible = "fsl,imx8mm-fec", "fsl,imx6sx-fec"; reg = <0x30be0000 0x10000>; - interrupt-names = "int0", "int1", "int2"; + interrupt-names = "int0", "int1", "int2", "pps"; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MM_CLK_ENET1_ROOT>, <&clk IMX8MM_CLK_ENET1_ROOT>, <&clk IMX8MM_CLK_ENET_TIMER>,
--
2.17.1
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