[PATCH v2 37/40] PCI: dwc/intel-gw: Move getting PCI_CAP_ID_EXP offset to intel_pcie_link_setup()
From: Rob Herring <robh@kernel.org>
Date: 2020-08-21 03:56:59
Also in:
linux-amlogic, linux-arm-msm, linux-omap, linux-pci, linux-samsung-soc, linux-tegra
Subsystem:
pci native host bridge and endpoint drivers, pci subsystem, pcie driver for intel lgm gw soc, the rest · Maintainers:
Lorenzo Pieralisi, Krzysztof Wilczyński, Manivannan Sadhasivam, Bjorn Helgaas, Linus Torvalds
The PCI_CAP_ID_EXP offset is only needed by intel_pcie_link_setup(), so let's retrieve it there and avoid storing the offset. Cc: Dilip Kota <redacted> Cc: Lorenzo Pieralisi <redacted> Cc: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rob Herring <robh@kernel.org> --- drivers/pci/controller/dwc/pcie-intel-gw.c | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
index 6b102197a1b6..807e1fa1bd6f 100644
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c@@ -72,7 +72,6 @@ struct intel_pcie_port { struct clk *core_clk; struct reset_control *core_rst; struct phy *phy; - u8 pcie_cap_ofst; }; static void pcie_update_bits(void __iomem *base, u32 ofs, u32 mask, u32 val)
@@ -132,7 +131,7 @@ static void intel_pcie_ltssm_disable(struct intel_pcie_port *lpp) static void intel_pcie_link_setup(struct intel_pcie_port *lpp) { u32 val; - u8 offset = lpp->pcie_cap_ofst; + u8 offset = dw_pcie_find_capability(&lpp->pci, PCI_CAP_ID_EXP); val = pcie_rc_cfg_rd(lpp, offset + PCI_EXP_LNKCAP); lpp->max_width = FIELD_GET(PCI_EXP_LNKCAP_MLW, val);
@@ -328,7 +327,6 @@ static void intel_pcie_turn_off(struct intel_pcie_port *lpp) static int intel_pcie_host_setup(struct intel_pcie_port *lpp) { - struct device *dev = lpp->pci.dev; int ret; intel_pcie_core_rst_assert(lpp);
@@ -346,17 +344,6 @@ static int intel_pcie_host_setup(struct intel_pcie_port *lpp) goto clk_err; } - if (!lpp->pcie_cap_ofst) { - ret = dw_pcie_find_capability(&lpp->pci, PCI_CAP_ID_EXP); - if (!ret) { - ret = -ENXIO; - dev_err(dev, "Invalid PCIe capability offset\n"); - goto app_init_err; - } - - lpp->pcie_cap_ofst = ret; - } - intel_pcie_rc_setup(lpp); ret = intel_pcie_app_logic_setup(lpp); if (ret)
--
2.25.1
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