Hi Sven,

On Thu, Jun 25, 2020 at 11:01 AM Sven Van Asbroeck [off-list ref] wrote:

On imx6, the ethernet reference clock (clk_enet_ref) can be generated
by either the imx6, or an external source (e.g. an oscillator or the
PHY). When generated by the imx6, the clock source (from ANATOP)
must be routed to the input of clk_enet_ref via two pads on the SoC,
typically via a dedicated track on the PCB.

On an imx6 plus however, there is a new setting which enables this
clock to be routed internally on the SoC, from its ANATOP clock
source, straight to clk_enet_ref, without having to go through
the SoC pads.

Board designs where the clock is generated by the imx6 should not
be affected by routing the clock internally. Therefore on a plus,
we can enable internal routing by default.

Signed-off-by: Sven Van Asbroeck <redacted>

I have tested this series on an imx6qp sabresd and unfortunately, it
breaks Ethernet as I can no longer get an IP address from the DHCP
server.

Without this series, IP address can normally be retrieved.

Therefore I suggest to create a device tree property for this feature
and only enable it when such device tree property is present.

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