Re: [PATCH 08/26] KVM: arm64: Use TTL hint in when invalidating stage-2 translations
From: James Morse <james.morse@arm.com>
Date: 2020-05-12 17:26:26
Also in:
kvm, kvmarm
Hi Marc, On 22/04/2020 13:00, Marc Zyngier wrote:
Since we always have a precide idea of the level we're dealing with
(precise)
when invalidating TLBs, we can provide it to as a hint to our invalidation helper.
quoted hunk ↗ jump to hunk
diff --git a/arch/arm64/include/asm/stage2_pgtable.h b/arch/arm64/include/asm/stage2_pgtable.h index 326aac658b9da..7ed5c1a769a9b 100644 --- a/arch/arm64/include/asm/stage2_pgtable.h +++ b/arch/arm64/include/asm/stage2_pgtable.h@@ -230,4 +230,13 @@ stage2_pgd_addr_end(struct kvm *kvm, phys_addr_t addr, phys_addr_t end) return (boundary - 1 < end - 1) ? boundary : end; } +/* + * Level values for the ARMv8.4-TTL extension, mapping PUD/PMD/PTE and + * the architectural page-table level. + */ +#define S2_NO_LEVEL_HINT 0 +#define S2_PUD_LEVEL 1 +#define S2_PMD_LEVEL 2 +#define S2_PTE_LEVEL 3
Are these really just for stage2, would the stage1 definition be the same? ~ Digging into the VTCR_EL2.SL0 trickery, it does everything at pgd where there are no block mappings, and no hints, so it looks fine. Reviewed-by: James Morse <james.morse@arm.com> Thanks, James _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel