Thread (78 messages) 78 messages, 8 authors, 2020-05-27

Re: [PATCH 05/26] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors

From: Andrew Scull <hidden>
Date: 2020-05-06 10:11:30
Also in: kvm, kvmarm

On Wed, May 06, 2020 at 10:39:59AM +0100, Marc Zyngier wrote:
Hi Andrew,

On 2020-05-05 16:59, Andrew Scull wrote:
quoted
On Wed, Apr 22, 2020 at 01:00:29PM +0100, Marc Zyngier wrote:
quoted
Advertise bits [58:55] as reserved for SW in the S2 descriptors.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/include/asm/pgtable-hwdef.h | 2 ++
 1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h
b/arch/arm64/include/asm/pgtable-hwdef.h
index 6bf5e650da788..7eab0d23cdb52 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -177,10 +177,12 @@
 #define PTE_S2_RDONLY		(_AT(pteval_t, 1) << 6)   /* HAP[2:1] */
 #define PTE_S2_RDWR		(_AT(pteval_t, 3) << 6)   /* HAP[2:1] */
 #define PTE_S2_XN		(_AT(pteval_t, 2) << 53)  /* XN[1:0] */
+#define PTE_S2_SW_RESVD		(_AT(pteval_t, 15) << 55) /* Reserved for
SW */

 #define PMD_S2_RDONLY		(_AT(pmdval_t, 1) << 6)   /* HAP[2:1] */
 #define PMD_S2_RDWR		(_AT(pmdval_t, 3) << 6)   /* HAP[2:1] */
 #define PMD_S2_XN		(_AT(pmdval_t, 2) << 53)  /* XN[1:0] */
+#define PMD_S2_SW_RESVD		(_AT(pmdval_t, 15) << 55) /* Reserved for
SW */

 #define PUD_S2_RDONLY		(_AT(pudval_t, 1) << 6)   /* HAP[2:1] */
 #define PUD_S2_RDWR		(_AT(pudval_t, 3) << 6)   /* HAP[2:1] */
--
2.26.1

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This is consistent with "Attribute fields in stage 1 VMSAv8-64 Block and
Page descriptors"
Do you mean "stage 2" instead? The reserved bits are the same, but I want
to be sure we have looked at the same thing (ARM DDI 0487F.a, D5-2603).
My turn for the copy-paste bug, yes "Attribute fields in stage 2
VMSAv8-64 Block and Page descriptors". And conviniently the same bits
are reserved for SW in both.

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