Thread (82 messages) 82 messages, 9 authors, 2020-05-19

Re: [PATCH v3 23/23] arm64: mte: Add Memory Tagging Extension documentation

From: Catalin Marinas <catalin.marinas@arm.com>
Date: 2020-05-15 12:13:54
Also in: linux-arch, linux-mm

On Fri, May 15, 2020 at 01:04:33PM +0100, Szabolcs Nagy wrote:
The 05/15/2020 12:27, Catalin Marinas wrote:
quoted
Thanks Szabolcs. While we are at this, no-one so far asked for the
GCR_EL1.RRND to be exposed to user (and this implies RGSR_EL1.SEED).
Since RRND=1 guarantees a distribution "no worse" than that of RRND=0, I
thought there isn't much point in exposing this configuration to the
user. The only advantage of RRND=0 I see is that the kernel can change
it seems RRND=1 is the impl specific algorithm.
Yes, that's the implementation specific algorithm which shouldn't be
worse than the standard one.
quoted
the seed randomly but, with only 4 bits per tag, it really doesn't
matter much.

Anyway, mentioning it here in case anyone is surprised later about the
lack of RRND configurability.
i'm not familiar with how irg works.
It generates a random tag based on some algorithm.
is the seed per process state that's set up at process startup in some
way? or shared (and thus effectively irg is non-deterministic in
userspace)?
The seed is only relevant if the standard algorithm is used (RRND=0).

-- 
Catalin

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