On Wed, May 20, 2020 at 9:44 AM Nicolas Saenz Julienne
[off-list ref] wrote:

On Tue, 2020-05-19 at 16:34 -0400, Jim Quinlan wrote:

quoted

From: Jim Quinlan <redacted>

The proper value of the parameter SCB_MAX_BURST_SIZE varies
per chip.  The 2711 family requires 128B whereas other devices
can employ 512.  The assignment is complicated by the fact
that the values for this two-bit field have different meanings;

  Value   Type_Generic    Type_7278

     00       Reserved         128B
     01           128B         256B
     10           256B         512B
     11           512B     Reserved

Signed-off-by: Jim Quinlan <redacted>
---
 drivers/pci/controller/pcie-brcmstb.c | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/controller/pcie-brcmstb.c

b/drivers/pci/controller/pcie-brcmstb.c
index 7bf945efd71b..0dfa1bbd9764 100644

--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c

@@ -53,7 +53,7 @@
 #define  PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK              0x1000
 #define  PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK   0x2000
 #define  PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK     0x300000
-#define  PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128              0x0
+
 #define  PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK          0xf8000000
 #define  PCIE_MISC_MISC_CTRL_SCB1_SIZE_MASK          0x07c00000
 #define  PCIE_MISC_MISC_CTRL_SCB2_SIZE_MASK          0x0000001f

@@ -276,6 +276,7 @@ struct brcm_pcie {
      int                     num_memc;
      u64                     memc_size[PCIE_BRCM_MAX_MEMC];
      u32                     hw_rev;
+     const struct of_device_id *of_id;
 };

 /*

@@ -841,7 +842,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
      int num_out_wins = 0;
      u16 nlw, cls, lnksta;
      int i, ret, memc;
-     u32 tmp, aspm_support;
+     u32 tmp, burst, aspm_support;

      /* Reset the bridge */
      brcm_pcie_bridge_sw_init_set(pcie, 1);

@@ -857,10 +858,20 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
      /* Wait for SerDes to be stable */
      usleep_range(100, 200);

+     /*
+      * SCB_MAX_BURST_SIZE is a two bit field.  For GENERIC chips it
+      * is encoded as 0=128, 1=256, 2=512, 3=Rsvd, for BCM7278 it
+      * is encoded as 0=Rsvd, 1=128, 2=256, 3=512.
+      */
+     if (strcmp(pcie->of_id->compatible, "brcm,bcm2711-pcie") == 0)

Would it make sense to use pcie->type here? I know GENERIC != BCM2711, but we
could define it and avoid adding redundant info in struct brcm_pcie.

Yes, that would get rid of the need for keeping of_id around.

Thanks,
Jim

Regards,
Nicolas

quoted

+             burst = 0x0; /* 128B */
+     else
+             burst = (pcie->type == BCM7278) ? 0x3 : 0x2; /* 512 bytes */
+
      /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */
      u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK);
      u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK);
-     u32p_replace_bits(&tmp, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128,
+     u32p_replace_bits(&tmp, burst,
                        PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK);
      writel(tmp, base + PCIE_MISC_MISC_CTRL);

@@ -1200,6 +1211,7 @@ static int brcm_pcie_probe(struct platform_device *pdev)
      pcie->reg_offsets = data->offsets;
      pcie->reg_field_info = data->reg_field_info;
      pcie->type = data->type;
+     pcie->of_id = of_id;

      res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
      pcie->base = devm_ioremap_resource(&pdev->dev, res);

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