On 2/20/20 2:09 PM, Alexandre Torgue wrote:

Hi Marek

Hi,

On 2/19/20 6:24 PM, Marek Vasut wrote:

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On 2/19/20 10:20 AM, Alexandre Torgue wrote:
Hi,
[...]

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This series adds the possibility to handle gpio interrupts on level.

GPIO hardware block is directly linked to EXTI block but EXTI
handles
external interrupts only on edge. To be able to handle GPIO
interrupt on
level a "hack" is done in gpio irq chip: parent interrupt (exti irq
chip)
is retriggered following interrupt type and gpio line value.

In exti irq chip, retrigger ops function is added.

btw. this might be unrelated, but is it possible to have e.g. gpioC2
set
as trigger-level-low and gpioD2 set as trigger-edge-falling ? It
seems
8eb2dfee9fb1 ("pinctrl: stm32: add lock mechanism for irqmux
selection")
prevents that.

No it's not possible. Each gpio line doesn't have a dedicated Exti
line
Each Exti line is muxing between gpio banks.

OK, that confirms my assumption.

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Mapping is done as following:

EXTI0 = A0 or B0 or C0 .... or Z0 : selected by Mux
EXTI1 = A1 or B1 or C1 ....or Z1 : selected by Mux
EXTI2 = A2 or B2 or C2 ....or Z2 : selected by Mux
...

Is it at least possible to have IRQs of the same type on the same exti
line? E.g. gpioA2 of trigger-edge-falling and gpioB2
trigger-edge-falling ?

Sorry I don't catch your point. If you already succeed to get gpioA2,
then you will failed to get gpioB2 but looking at function call stack we
could get an other issue.

Considering the EXTI line limitations, I'd like to know what kind of IRQ
input configuration is allowed/valid and what kind of configuration is
not valid.

As a mux is used to select which GPIO[A..Z]_X has to be mapped on exti_X
line, only one GPIO can be used on the EXTI line.

For example, on EXTI2 you could map either gpioa2 or gpiob2 or
....gpioz2 but not gpioa2 and gpiob2 in the same time.

Got it, thank you for the clarification.

Maybe that could be something to improve for MP2 :-)

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