On 2/19/20 12:43 PM, Marc Zyngier wrote:

On 2020-02-19 11:33, Alexandre Torgue wrote:

quoted

Fix Marc email address

On 2/18/20 2:12 PM, Alexandre Torgue wrote:

quoted

This commit introduces retrigger support for stm32_ext_h chip.
It consists to rise the GIC interrupt mapped to an EXTI line.

Signed-off-by: Alexandre Torgue <redacted>

diff --git a/drivers/irqchip/irq-stm32-exti.c 

b/drivers/irqchip/irq-stm32-exti.c
index e00f2fa27f00..c971d115edb4 100644

--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c

@@ -604,12 +604,24 @@ static void stm32_exti_h_syscore_deinit(void)

      unregister_syscore_ops(&stm32_exti_h_syscore_ops);
  }
  +static int stm32_exti_h_retrigger(struct irq_data *d)
+{
+    struct stm32_exti_chip_data *chip_data = 
irq_data_get_irq_chip_data(d);
+    const struct stm32_exti_bank *stm32_bank = chip_data->reg_bank;
+    void __iomem *base = chip_data->host_data->base;
+    u32 mask = BIT(d->hwirq % IRQS_PER_BANK);
+
+    writel_relaxed(mask, base + stm32_bank->swier_ofst);
+
+    return irq_chip_retrigger_hierarchy(d);

Calling irq_chip_retrigger_hierarchy here is really odd. If the write
above has the effect of making the interrupt pending again, why do you
need to force the retrigger any further?

To be honest, as we use hierarchical irq_chip, I thought it was the way 
to follow (to retrigger parent irq_chip). It makes maybe no sens here.
The most important to regenerate gic interrupt (associate to the exti 
line) is to write in SWIER register.

Alex

             M.

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