Thread (29 messages) 29 messages, 10 authors, 2020-03-11

Re: [PATCH] vfs: keep inodes with page cache off the inode shrinker LRU

From: Arnd Bergmann <arnd@arndb.de>
Date: 2020-02-15 16:59:24
Also in: cip-dev, linux-fsdevel, linux-mm, lkml

On Sat, Feb 15, 2020 at 12:25 PM Geert Uytterhoeven
[off-list ref] wrote:
On Thu, Feb 13, 2020 at 5:54 PM Arnd Bergmann [off-list ref] wrote:
quoted
On Wed, Feb 12, 2020 at 9:50 AM Russell King - ARM Linux admin
[off-list ref] wrote:
The CIP-supported RZ/G1 SoCs can have up to 4 GiB, typically split (even
for 1 GiB or 2 GiB configurations) in two parts, one below and one above
the 32-bit physical limit.
Good to know. I think there are several other chips that have dual-channel
DDR3 and thus /can/ support this configuration, but this rarely happens.
Are you aware of commercial products that use a 4GB configuration, aside from
the reference board?

For TI AM54x, there is apparently a variant of the Dragonbox Pyro with 4G,
which is said to be shipping in the near future, see
https://en.wikipedia.org/wiki/DragonBox_Pyra

     Arnd

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help