Re: [PATCH v2 1/7] clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram_alt/apb
From: Stephen Boyd <sboyd@kernel.org>
Date: 2019-09-16 20:33:16
Quoting Leonard Crestez (2019-08-20 08:45:06)
Dram frequency changes required modifying these clocks outside the control of clk framework. Mark them as CLK_GET_RATE_NOCACHE so that rates are always read back from registers.
Why can't we control the clks from the clk framework? Please add that information in the commit text here.
quoted hunk ↗ jump to hunk
Signed-off-by: Leonard Crestez <redacted> --- drivers/clk/imx/clk-imx8mm.c | 6 ++++-- drivers/clk/imx/clk-imx8mn.c | 6 ++++-- drivers/clk/imx/clk-imx8mq.c | 7 ++++--- 3 files changed, 12 insertions(+), 7 deletions(-)diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 4ead3ea2713c..6cac80550f43 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c@@ -526,12 +526,14 @@ static int imx8mm_clocks_probe(struct platform_device *pdev) /* IPG */ clks[IMX8MM_CLK_IPG_ROOT] = imx_clk_divider2("ipg_root", "ahb", base + 0x9080, 0, 1); clks[IMX8MM_CLK_IPG_AUDIO_ROOT] = imx_clk_divider2("ipg_audio_root", "audio_ahb", base + 0x9180, 0, 1); /* IP */ - clks[IMX8MM_CLK_DRAM_ALT] = imx8m_clk_composite("dram_alt", imx8mm_dram_alt_sels, base + 0xa000); - clks[IMX8MM_CLK_DRAM_APB] = imx8m_clk_composite_critical("dram_apb", imx8mm_dram_apb_sels, base + 0xa080); + clks[IMX8MM_CLK_DRAM_ALT] = __imx8m_clk_composite("dram_alt", imx8mm_dram_alt_sels, base + 0xa000, + CLK_GET_RATE_NOCACHE); + clks[IMX8MM_CLK_DRAM_APB] = __imx8m_clk_composite("dram_apb", imx8mm_dram_apb_sels, base + 0xa080, + CLK_IS_CRITICAL | CLK_GET_RATE_NOCACHE);
Also, add a comment to this effect about why it can't be done from the clk framework wherever the CLK_GET_RATE_NOCACHE flag is set. Basically this flag is a hack and is an example of something that we need to fix.
clks[IMX8MM_CLK_VPU_G1] = imx8m_clk_composite("vpu_g1", imx8mm_vpu_g1_sels, base + 0xa100);
clks[IMX8MM_CLK_VPU_G2] = imx8m_clk_composite("vpu_g2", imx8mm_vpu_g2_sels, base + 0xa180);
clks[IMX8MM_CLK_DISP_DTRC] = imx8m_clk_composite("disp_dtrc", imx8mm_disp_dtrc_sels, base + 0xa200);
clks[IMX8MM_CLK_DISP_DC8000] = imx8m_clk_composite("disp_dc8000", imx8mm_disp_dc8000_sels, base + 0xa280);
clks[IMX8MM_CLK_PCIE1_CTRL] = imx8m_clk_composite("pcie1_ctrl", imx8mm_pcie1_ctrl_sels, base + 0xa300);_______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel