On 03/07/2019 01:45, Martin Blumenstingl wrote:
On Mon, Jul 1, 2019 at 11:13 AM Neil Armstrong [off-list ref] wrote:
quoted
Enable DVFS for the Odroid-N2 by setting the clock, OPP and supply
for each cores of each CPU clusters.
The first cluster uses the "VDDCPU_B" power supply, and the second
cluster uses the "VDDCPU_A" power supply.
Each power supply can achieve 0.73V to 1.01V using 2 distinct PWM
outputs clocked at 800KHz with an inverse duty-cycle.
DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations of each cluster and
checking the final frequency using the clock-measurer, script at [2].
[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
Signed-off-by: Neil Armstrong <redacted>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[...]
quoted
+ vddcpu_b: regulator-vddcpu-b {
+ /*
+ * Silergy SY8120B1ABC Regulator.
+ */
interesting that they use different regulator ICs for CPU A and CPU B
the public schematics confirm your comments
Yep they use a Silergy one for VDDCPU_B on every schematics I have.
The A311D VIM3 have a slightly different one, but still Silergy for VDDCPU_B.
https://dl.khadas.com/Hardware/VIM3/Schematic/VIM3_V11_Sch.pdf
Neil
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