Thread (43 messages) 43 messages, 9 authors, 2019-01-04

Re: [PATCH v6 08/13] arm64: expose user PAC bit positions via ptrace

From: Will Deacon <hidden>
Date: 2018-12-10 14:29:25
Also in: kvmarm, lkml

On Mon, Dec 10, 2018 at 08:22:06AM -0600, Richard Henderson wrote:
On 12/10/18 6:03 AM, Catalin Marinas wrote:
quoted
quoted
However, it won't be too long before someone implements support for
ARMv8.2-LVA, at which point, without changes to mandatory pointer tagging, we
will only have 3 authentication bits: [54:52].  This seems useless and easily
brute-force-able.
Such support is already here (about to be queued):

https://lore.kernel.org/linux-arm-kernel/20181206225042.11548-1-steve.capper@arm.com/ (local)
Thanks for the pointer.
quoted
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Unfortunately, there is no obvious path to making this optional that does not
break compatibility with Documentation/arm64/tagged-pointers.txt.
There is also the ARMv8.5 MTE (memory tagging) which relies on tagged
pointers.
So it does.  I hadn't read through that extension completely before.
quoted
An alternative would be to allow the opt-in to 52-bit VA, leaving it at
48-bit by default. However, it has the problem of changing the PAC size
and not being able to return.
Perhaps the opt-in should be at exec time, with ELF flags (or equivalent) on
the application.  Because, as you say, changing the shape of the PAC in the
middle of execution is in general not possible.
I think we'd still have a potential performance problem with that approach,
since we'd end up having to context-switch TCR.T0SZ, which is permitted to
be cached in a TLB and would therefore force us to introduce TLB
invalidation when context-switching between tasks using 52-bit VAs and tasks
using 48-bit VAs.

There's a chance we could get the architecture tightened here, but it's
not something we've pushed for so far and it depends on what's already been
built.

Will

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