[PATCH 12/16] clocksource: Add clock driver for RDA8810PL SoC
From: Linus Walleij <hidden>
Date: 2018-11-20 08:57:40
Also in:
linux-devicetree, lkml
From: Linus Walleij <hidden>
Date: 2018-11-20 08:57:40
Also in:
linux-devicetree, lkml
On Tue, Nov 20, 2018 at 9:17 AM Marc Zyngier [off-list ref] wrote:
How does this change anything with the fact that the above code is
broken? 56 or 64 bit, you cannot read this counter with a single
access, or two. The canonical way of reading such a counter is
something like this:
do {
lo = readl_relaxed(LO);
hi = readl_relaxed(HI);
} while (hi != read_relaxed(HI));To be fair, I have seen hardware that employ a logic latch such that when a read access is done to the LO register, the value of the whole counter is latched, also for the HI register, so when you read the HI register in the second step, it is never subject to wrapping. (Conversely reading the HI before the LO will always give you insane values :D) However the above code should be fine unless you know for sure the hardware was constructed with a clever latch. Yours, Linus Walleij