Manivannan,

On 19/11/2018 17:09, Manivannan Sadhasivam wrote:

Should be static?

+
+static void rda_intc_mask_irq(struct irq_data *d)
+{
+	void __iomem *base = (void __iomem *)irq_data_get_irq_chip_data(d);

Aliases with the above. Please choose whether you want a global or a
per-interrupt base.

+
+	writel(BIT(d->hwirq), base + RDA_INTC_MASK_CLR);

writel_relaxed()

+}
+
+static void rda_intc_unmask_irq(struct irq_data *d)
+{
+	void __iomem *base = (void __iomem *)irq_data_get_irq_chip_data(d);
+
+	writel(BIT(d->hwirq), base + RDA_INTC_MASK_SET);

Same here.

+}
+
+static int rda_intc_set_type(struct irq_data *data, unsigned int flow_type)
+{
+	if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))
+		irq_set_handler(data->irq, handle_edge_irq);
+	if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW))
+		irq_set_handler(data->irq, handle_level_irq);

So you don't need to set anything in your interrupt controller for this
to switch between level and edge? That'd be a first...

+
+	return 0;
+}
+
+struct irq_domain *rda_irq_domain;

static?

+
+static void __exception_irq_entry rda_handle_irq(struct pt_regs *regs)
+{
+	u32 stat = readl(base + RDA_INTC_FINALSTATUS);
+	u32 hwirq;
+
+	while (stat) {
+		hwirq = __fls(stat);
+		handle_domain_irq(rda_irq_domain, hwirq, regs);
+		stat &= ~(1 << hwirq);
+	}
+}
+
+static struct irq_chip rda_irq_chip = {
+	.name		= "rda-intc",
+	.irq_ack	= rda_intc_mask_irq,

You're joking, right? What does it mean to implement both ack as mask
when you already have mask?

+	.irq_mask	= rda_intc_mask_irq,
+	.irq_unmask	= rda_intc_unmask_irq,
+	.irq_set_type	= rda_intc_set_type,
+	.irq_disable	= rda_intc_mask_irq,

What is this disable for? Implementing enable/disable only makes sense
if their different implementation differs from mask/unmask (and that
they add some real value, such as allocating resource).

+};
+
+static int rda_irq_map(struct irq_domain *d,
+		       unsigned int virq, irq_hw_number_t hw)
+{
+	irq_set_status_flags(virq, IRQ_LEVEL);
+	irq_set_chip_and_handler(virq, &rda_irq_chip, handle_level_irq);

The set_type callback is specially puzzling when you set everything to
be level...

+	irq_set_chip_data(virq, d->host_data);
+	irq_set_probe(virq);
+
+	return 0;
+}
+
+static const struct irq_domain_ops rda_irq_domain_ops = {
+	.map = rda_irq_map,
+	.xlate = irq_domain_xlate_onecell,

... and don't have any way to express an edge interrupt in DT.

+};
+
+static int __init rda8810_intc_init(struct device_node *node,
+				    struct device_node *parent)
+{
+	base = of_io_request_and_map(node, 0, "rda-intc");
+	if (!base)
+		return -ENXIO;
+	/*
+	 * Mask, and invalid all interrupt sources
+	 */
+	writel(RDA_IRQ_MASK_ALL, base + RDA_INTC_MASK_CLR);
+
+	rda_irq_domain = irq_domain_create_linear(&node->fwnode, RDA_NR_IRQS,
+						  &rda_irq_domain_ops, base);
+	WARN_ON(!rda_irq_domain);

Just WARN_ON(), and carry on? Please implement some error handling.

+
+	set_handle_irq(rda_handle_irq);
+
+	return 0;
+}
+
+IRQCHIP_DECLARE(rda_intc, "rda,8810pl-intc", rda8810_intc_init);

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...