Thread (15 messages) 15 messages, 3 authors, 2018-10-08

[PATCH v5 2/7] dmaengine: xilinx_dma: in axidma slave_sg and dma_cyclic mode align split descriptors

From: vkoul@kernel.org (Vinod)
Date: 2018-10-02 14:58:26
Also in: dmaengine, linux-devicetree, lkml

On 28-09-18, 09:11, Andrea Merello wrote:
On Tue, Sep 18, 2018 at 6:21 PM Vinod [off-list ref] wrote:
quoted
quoted
@@ -1804,7 +1817,7 @@ static struct dma_async_tx_descriptor *xilinx_dma_prep_slave_sg(
                       * Calculate the maximum number of bytes to transfer,
                       * making sure it is less than the hw limit
                       */
-                     copy = xilinx_dma_calc_copysize(sg_dma_len(sg),
+                     copy = xilinx_dma_calc_copysize(chan, sg_dma_len(sg),
why not keep chan in patch 1 and add only handling in patch 2, seems
less churn to me..
Indeed this was something I was unsure about.. I ended up in feeling
better not to add introduce a function that takes an unused (yet)
argument, but I can change this of course :)
IMO It is fine to add a user in subsequent patch in a series. Not fine to
add something and not use in "that" series :)

-- 
~Vinod
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