[PATCH 3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer
From: Radhey Shyam Pandey <hidden>
Date: 2018-08-29 17:05:29
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-----Original Message----- From: Vinod <vkoul@kernel.org> Sent: Wednesday, August 29, 2018 9:31 AM To: Radhey Shyam Pandey <redacted> Cc: dan.j.williams at intel.com; Michal Simek <redacted>; Appana Durga Kedareswara Rao [off-list ref]; lars at metafoo.de; dmaengine at vger.kernel.org; linux-arm-kernel at lists.infradead.org; linux- kernel at vger.kernel.org Subject: Re: [PATCH 3/3] dmaengine: xilinx_dma: Fix 64-bit simple CDMA transfer On 28-08-18, 14:03, Radhey Shyam Pandey wrote:quoted
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On 27-07-18, 16:20, Radhey Shyam Pandey wrote:quoted
In AXI CDMA simple mode also pass MSB bits of source and destination address to xilinx_write function. This fixes simple CDMA operation mode using 64-bit addressing. Signed-off-by: Radhey Shyam Pandey[off-list ref]quoted
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Signed-off-by: Michal Simek <redacted> --- drivers/dma/xilinx/xilinx_dma.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-)diff --git a/drivers/dma/xilinx/xilinx_dma.cb/drivers/dma/xilinx/xilinx_dma.cquoted
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index a37871e..2e15d86 100644--- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c@@ -1245,8 +1245,10 @@ static void xilinx_cdma_start_transfer(structxilinx_dma_chan *chan)quoted
hw = &segment->hw; - xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw- src_addr); - xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw- dest_addr); + xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,(dma_addr_t)quoted
+ ((u64)hw->src_addr_msb << 32 | hw->src_addr));so this is: (dma_addr_t)((u64)hw->src_addr_msb << 32 | hw->src_addr) what is src_addr data type? I think its u32. It would be better to update xilinx_write() to take u64 and not dma_addr_t.Yes, src_addr_msb and src_addr BD fields are u32. To explain: There is no prob in xilinx_write it takes dma_addr_t as an arg which is 32/64 bit depending on _DMA_ADDR_T_64BIT. In 64bit CDMA transfer, there was abugquoted
i.e in the call to xilinx_write src_addr_msb 32 bits were not passed. To fix that combine MSB and LSB 32 bits before passing it to xilinx_write.Yeah that part was clear but the implementation can be better..
Thanks! Separate fields for source address are needed due to CDMA BD structure. Please suggest if it doesn't look ok.
-- ~Vinod