On Tue, 24 Jul 2018 19:19:54 +0200
Paul Kocialkowski [off-list ref] wrote:

Hi,

Le vendredi 20 avril 2018 ? 11:35 +0200, Philipp Rossak a ?crit :

quoted

Hi Kyle,

I'm already working on a Version 3 of this patch series. Right now this 
slowed down since I'm very busy and the ToDo-List is still very long.

My plan is to send out a version during this release cycle.

If you need it right now feel free to submit patches!

I just came around this patch while testing SID support for H3, that is
not enabled in the dts at this point despite driver support.

Maxime, would it make sense to merge this patch as-is, without support
for the thermal calibration section, since the two aspects seem rather
independent (and some other SoCs also have a SID node without linkage
for thermal support anyway)?

Cheers,

Paul

 Hello Paul,

 I've sent a serie yesterday for SID on A64/H3/H5.
 https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=761

 Cheers,

quoted

Philipp

On 19.04.2018 17:19, Kyle Evans wrote:

quoted

On Thu, Apr 19, 2018 at 10:13 AM, Icenowy Zheng [off-list ref] wrote:

quoted

? 2018?4?19? GMT+08:00 ??11:11:22, Kyle Evans [off-list ref] ??:

quoted

On Mon, Jan 29, 2018 at 6:03 AM, Philipp Rossak [off-list ref]
wrote:

quoted

On 29.01.2018 10:52, Maxime Ripard wrote:

quoted

On Mon, Jan 29, 2018 at 12:29:17AM +0100, Philipp Rossak wrote:

quoted

This patch enables the the sid controller in the H3. It can be used
for thermal calibration data.

Signed-off-by: Philipp Rossak <redacted>
---
   arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++++++
   1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi

b/arch/arm/boot/dts/sun8i-h3.dtsi
index 3f83f6a27c74..9bb5cc29fec5 100644

--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi

@@ -72,6 +72,13 @@
                 };
         };
   +     soc {
+               sid: eeprom at 1c14000 {
+                       compatible = "allwinner,sun8i-h3-sid";
+                       reg = <0x01c14000 0x400>;
+               };
+       };
+

Shouldn't you also use a nvmem-cells property to the THS node?

Maxime

Oh seems like I forgot that.
As related to the wiki [1] this should be 64 bit wide at the address

0x34. I

quoted

will add that in the next version.


[1]: http://linux-sunxi.org/SID_Register_Guide#eFUSE

Thanks,
Philipp

Hi,

Any chance this will see a v3 soon? I'm kind of interested in sid node
for h3. =)

This patch is independent and can be easily sent out
by its own.

Right- I had considered doing so, but wanted to make sure I wasn't
going to collide with this series if a v3 is imminent.

-- 
Developer of free digital technology and hardware support.

Website: https://www.paulk.fr/
Coding blog: https://code.paulk.fr/
Git repositories: https://git.paulk.fr/ https://git.code.paulk.fr/

-- 
Emmanuel Vadot [off-list ref] [off-list ref]