Thread (16 messages) 16 messages, 5 authors, 2018-07-24

[PATCH v2 2/3] reset: imx7: Fix always writing bits as 0

From: p.zabel@pengutronix.de (Philipp Zabel)
Date: 2018-07-23 11:03:10
Also in: linux-pci, linux-pm, lkml

On Mon, 2018-07-23 at 11:41 +0200, Lucas Stach wrote:
As this doesn't depend on any other patch in this series, I think it
would be fine if Philipp?takes this patch through the reset tree.

Regards,
Lucas

Am Freitag, den 20.07.2018, 15:47 +0300 schrieb Leonard Crestez:
quoted
Right now the only user of reset-imx7 is pci-imx6 and the
reset_control_assert and deassert calls on pciephy_reset don't toggle
the PCIEPHY_BTN and PCIEPHY_G_RST bits as expected. Fix this by writing
1 or 0 respectively.

The reference manual is not very clear regarding SRC_PCIEPHY_RCR but for
other registers like MIPIPHY and HSICPHY the bits are explicitly
documented as "1 means assert, 0 means deassert".

The values are still reversed for IMX7_RESET_PCIE_CTRL_APPS_EN.
quoted
Signed-off-by: Leonard Crestez <redacted>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Thank you, applied to reset/fixes.

regards
Philipp
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