[PATCH v2 2/3] clk: meson: add sub MMC clock dt-bindings IDs
STALE3004d
From: Yixun Lan <hidden>
Date: 2018-07-10 08:40:49
Also in:
linux-amlogic, linux-clk, linux-devicetree, lkml
Subsystem:
common clk framework, open firmware and flattened device tree bindings, the rest · Maintainers:
Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Revision v2 of 4 in this series.
Revisions (4)
- v1 [diff vs current]
- v2 current
- v3 [diff vs current]
- v4 [diff vs current]
Add two clock bindings IDs which provided by the MMC clock controller, These two clocks will be used by MMC or NAND driver. Signed-off-by: Yixun Lan <redacted> --- .../dt-bindings/clock/amlogic,meson-mmc-clkc.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 include/dt-bindings/clock/amlogic,meson-mmc-clkc.h
diff --git a/include/dt-bindings/clock/amlogic,meson-mmc-clkc.h b/include/dt-bindings/clock/amlogic,meson-mmc-clkc.h
new file mode 100644
index 000000000000..2ae988ebc3ae
--- /dev/null
+++ b/include/dt-bindings/clock/amlogic,meson-mmc-clkc.h@@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Meson MMC sub clock tree IDs + * + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + * Author: Yixun Lan <yixun.lan@amlogic.com> + */ + +#ifndef __MMC_CLKC_H +#define __MMC_CLKC_H + +#define CLKID_MMC_DIV 1 +#define CLKID_MMC_PHASE_TX 3 +#define CLKID_MMC_PHASE_RX 4 + +#endif
--
2.18.0