Hi Baruch,

On Tue, 26 Jun 2018 06:37:24 +0300, Baruch Siach [off-list ref]
wrote:

Hi Miquel,

On Mon, Jun 25, 2018 at 05:12:22PM +0200, Miquel Raynal wrote:

quoted

Until recently, only one register was referenced in MVEBU thermal IP
node. Recent changes added a second entry pointing to another
register right next to it. We cannot know for sure that we will not
have to access other registers. That will be actually the case when
overheat interrupt feature will come, where it will be needed to access
DFX registers in the same area.

This approach is not scalable so intead of adding consinuously memory
areas in the DT (and change de DT bindings, while keeping backward  

s/de/the/

Oh and s/intead/instead/ too.

Thanks for pointing it,
Miqu?l