Thread (9 messages) 9 messages, 2 authors, 2018-02-27
STALE3063d REVIEWED: 4 (4M)
Revisions (2)
  1. v2 [diff vs current]
  2. v3 current

[PATCH V3 6/6] PCI: Add device wait after slot and bus reset

From: Sinan Kaya <hidden>
Date: 2018-01-02 17:00:41
Also in: linux-arm-msm, linux-pci, lkml
Subsystem: pci subsystem, the rest · Maintainers: Bjorn Helgaas, Linus Torvalds

Rev 3.1 Sec 2.3.1 Request Handling Rules indicates that a device can issue
CRS following secondary bus reset. Handle device presence gracefully.

Signed-off-by: Sinan Kaya <redacted>
Reviewed-by: Christoph Hellwig <hch@lst.de>
---
 drivers/pci/pci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index eae04aa..2c9e9a9 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4161,7 +4161,7 @@ int pci_reset_bridge_secondary_bus(struct pci_dev *dev)
 {
 	pcibios_reset_secondary_bus(dev);
 
-	return 0;
+	return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
 }
 EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus);
 
-- 
1.9.1
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