[PATCH V2 6/7] PCI: add device wait after slot and bus reset
From: Sinan Kaya <hidden>
Date: 2017-11-27 06:20:45
Also in:
linux-arm-msm, linux-pci, lkml
Subsystem:
pci subsystem, the rest · Maintainers:
Bjorn Helgaas, Linus Torvalds
Rev 3.1 Sec 2.3.1 Request Handling Rules indicates that a device can issue CRS following secondary bus reset. Handle device presence gracefully. Signed-off-by: Sinan Kaya <redacted> --- drivers/pci/pci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0a9a696..8472c24 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c@@ -4035,7 +4035,7 @@ int pci_reset_bridge_secondary_bus(struct pci_dev *dev) { pcibios_reset_secondary_bus(dev); - return 0; + return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS); } EXPORT_SYMBOL_GPL(pci_reset_bridge_secondary_bus);
--
1.9.1