n900 in next-20170901
From: tony@atomide.com (Tony Lindgren)
Date: 2017-11-14 19:44:45
Also in:
linux-omap, lkml
From: tony@atomide.com (Tony Lindgren)
Date: 2017-11-14 19:44:45
Also in:
linux-omap, lkml
* Tero Kristo [off-list ref] [171114 19:34]:
I guess you could just use rx51_secure_dispatcher and ditch the save_secure_ram_context call completely (and most of the other related code)? That one would handle the cache also in a clean manner. Something like: rx51_secure_dispatcher(25, 0, FLAG_START_CRITICAL, 4, __pa(omap3_secure_ram_storage), 0, 1, 1);
That's different, as rx51_secure_dispatcher does the following: - Use arguments + 1 instead of 4, we currently use just 4 - Disables local_irq and fiq, we are not doing that now - Flushes and invalidates cache range, we are not doing that - Calls omap_smc3 that only does mov r6, #0xff, and does not do mov r2, #4 - Missing nops after it's done This just based on a quick look I did earlier. So just because of the extra work it does we don't want to do it even if it worked :) Regards, Tony