[PATCH 05/38] ARM: dts: sk-rzg1m: add Ether pins
From: Simon Horman <hidden>
Date: 2017-07-31 15:19:17
Also in:
linux-renesas-soc
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: Simon Horman <hidden>
Date: 2017-07-31 15:19:17
Also in:
linux-renesas-soc
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: Sergei Shtylyov <redacted> Add the (previously omitted) Ether/PHY pin data to the SK-RZG1M board's device tree. Signed-off-by: Sergei Shtylyov <redacted> Signed-off-by: Simon Horman <redacted> --- arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
index 97a066c22003..3d918d106593 100644
--- a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
+++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts@@ -44,6 +44,16 @@ groups = "scif0_data_d"; function = "scif0"; }; + + ether_pins: ether { + groups = "eth_link", "eth_mdio", "eth_rmii"; + function = "eth"; + }; + + phy1_pins: phy1 { + groups = "intc_irq0"; + function = "intc"; + }; }; &scif0 {
@@ -54,6 +64,9 @@ }; ðer { + pinctrl-0 = <ðer_pins &phy1_pins>; + pinctrl-names = "default"; + phy-handle = <&phy1>; renesas,ether-link-active-low; status = "okay";
--
2.1.4