[PATCH v8 1/3] perf: cavium: Support memory controller PMU counters
From: Jan Glauber <hidden>
Date: 2017-07-26 15:45:32
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From: Jan Glauber <hidden>
Date: 2017-07-26 15:45:32
Also in:
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On Wed, Jul 26, 2017 at 05:35:02PM +0200, Borislav Petkov wrote:
On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote:quoted
I'm also looking for CPU implementor (MIDR), I could check for the model too but I still need to detect devices based on PCI IDs as the model check is not sufficient here (only multi-socket ThunderX has OCX TLK devices).So what does that mean? The only way to load a PMU driver and an EDAC driver is the PCI ID of the memory controller? No other way?
I already tried multiple ways to load the drivers, so far with limited success :) The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'. I'm not aware of other ways to access these devices. Please enlighten me if I'm missing something. --Jan