Thread (37 messages) 37 messages, 8 authors, 2017-08-15

[PATCH v8 1/3] perf: cavium: Support memory controller PMU counters

From: bp@alien8.de (Borislav Petkov)
Date: 2017-07-26 15:35:37
Also in: lkml

On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote:
I'm also looking for CPU implementor (MIDR), I could check for the model
too but I still need to detect devices based on PCI IDs as the model
check is not sufficient here (only multi-socket ThunderX has OCX TLK
devices).
So what does that mean? The only way to load a PMU driver and an EDAC
driver is the PCI ID of the memory controller? No other way?

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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