[PATCH v3 5/6] pwm: mediatek: add PWM_CLK_DIV_MAX
From: zhi.mao@mediatek.com (Zhi Mao)
Date: 2017-06-30 06:05:58
Also in:
linux-devicetree, linux-mediatek, linux-pwm, lkml
Subsystem:
pwm subsystem, the rest · Maintainers:
Uwe Kleine-König, Linus Torvalds
1. Replace "7" with "PWM_CLK_DIV_MAX" in function:mtk_pwm_config() to improve the code readablity. 2. add pwm clk disable in function:mtk_pwm_config() for error parameter checking case. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> --- drivers/pwm/pwm-mediatek.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index 554a042..1d78ab1 100644
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c@@ -30,6 +30,8 @@ #define PWMDWIDTH 0x2c #define PWMTHRES 0x30 +#define PWM_CLK_DIV_MAX 7 + enum { MTK_CLK_MAIN = 0, MTK_CLK_TOP,
@@ -130,8 +132,11 @@ static int mtk_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, clkdiv++; } - if (clkdiv > 7) + if (clkdiv > PWM_CLK_DIV_MAX) { + mtk_pwm_clk_disable(chip, pwm); + dev_err(chip->dev, "period %d not supported\n", period_ns); return -EINVAL; + } mtk_pwm_writel(pc, pwm->hwpwm, PWMCON, BIT(15) | clkdiv); mtk_pwm_writel(pc, pwm->hwpwm, PWMDWIDTH, period_ns / resolution);
--
1.7.9.5