On 06/20/2017 01:50 PM, Lee Jones wrote:

On Fri, 16 Jun 2017, Fabrice Gasnier wrote:

quoted

Add documentation for STMicroelectronics STM32 Low Power Timer binding.

Signed-off-by: Fabrice Gasnier <redacted>
---
 .../devicetree/bindings/mfd/stm32-lptimer.txt      | 51 ++++++++++++++++++++++
 1 file changed, 51 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/stm32-lptimer.txt

diff --git a/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt b/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt
new file mode 100644
index 0000000..237b7d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt

@@ -0,0 +1,51 @@
+STMicroelectronics STM32 Low Power Timer
+
+The STM32 Low Power Timer (LPTIM) is a 16-bit timer that provides several
+functionalities:

"functions".

Hi Lee,

I'll fix it in v2.

quoted

+- PWM output (with programmable prescaler, configurable polarity)
+- Quadrature encoder, counter
+- Trigger source for STM32 ADC/DAC (LPTIM_OUT)
+
+Required properties:
+- compatible: Must be "st,stm32-lptimer".
+- reg: Offset and length of the device's register set.
+- clocks: Phandle to the clock used by the LP Timer module.
+- clock-names: Must be "int".

These look better when padded:

- compatible:		Must be "st,stm32-lptimer".
- reg:			Offset and length of the device's register set.
- clocks:		Phandle to the clock used by the LP Timer module.
- clock-names:		Must be "int".

quoted

+- #address-cells = <1>;
+- #size-cells = <0>;

Please use the same format as you did for the other properties.

I'll fix it in v2.

quoted

+Optional properties:
+- resets: Must contain the phandle to the reset controller.
+
+Optional subnodes:
+- pwm: See ../pwm/pwm-stm32-lp.txt
+- counter: See ../iio/timer/stm32-lptimer-cnt.txt
+- trigger: See ../iio/timer/stm32-lptimer-trigger.txt
+
+Example:
+
+	lptimer1: lptimer at 0x40002400 {

Remove '0x'

nice shot :-)

quoted

+		compatible = "st,stm32-lptimer";
+		reg = <0x40002400 0x400>;
+		clocks = <&timer_clk>;
+		clock-names = "int";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		pwm {
+			compatible = "st,stm32-pwm-lp";
+			pinctrl-names = "default";
+			pinctrl-0 = <&lppwm1_pins>;
+		};
+
+		trigger at 0 {

Why is this @0 and no reg properties are provided for the other 2
nodes?

This is to select each LPTimer configuration (similar to stm32-timers).
All LPTimers that provide output as trigger for ADC and/or DAC are the
same, except for which hardware signals they're connected to, and send
to ADC and/or DAC.
"reg" is used as index for trigger table in trigger driver code (PATCH
6): it must be 0 for lptimer1 output, 1 for lptimer2 output or 2 for
lptimer3 output.
I should probably document it in stm32-lptimer-trigger dt-bindings ?

This is not needed for other two nodes.

Thanks for reviewing,
Best Regards,
Fabrice

quoted

+			compatible = "st,stm32-lptimer-trigger";
+			reg = <0>;
+		};
+
+		counter {
+			compatible = "st,stm32-lptimer-counter";
+			pinctrl-names = "default";
+			pinctrl-0 = <&lptim1_in_pins>;
+		};
+	};