On 03/20, Yuantian Tang wrote:

From: Scott Wood <oss@buserror.net>

ls1012a has separate input root clocks for core PLLs versus the
platform PLL, with the latter described as sysclk in the hw docs.
If a second input clock, named "coreclk", is present, this clock will be
used for the core PLLs.

Signed-off-by: Scott Wood <oss@buserror.net>
Signed-off-by: Tang Yuantian <redacted>
Acked-by: Rob Herring <robh@kernel.org>
---

Applied to clk-next

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