On Fri, Feb 17, 2017 at 5:22 AM, Chris Packham
[off-list ref] wrote:

Hi Arnd,
On 17/02/17 02:28, Arnd Bergmann wrote:

quoted

On Thursday, February 16, 2017 9:50:39 PM CET Chris Packham wrote:

quoted

The DFX server on the 98dx3236 and compatible SoCs has an ID register
that provides revision information that the PCI based ID register
doesn't have. Use this if it's available.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

How about putting this new code into a separate driver in
drivers/soc/? I don't think you need the early probing we have
here, and not that much is shared otherwise.

Not putting it there means we'll get the pci fall-back behaviour which
will result in a incorrect rev value. Having said that no callers of
mvebu_get_soc_id() currently care about these specific SoCs so not
having the right rev is not an issue at the moment.

We should still care about incorrect IDs as they are shown to user space,
which could start relying on it in theory.

However, the PCI ID should only be used on chips that have a PCI
host with an ID known to be correct, so maybe we can restrict
get_soc_id_by_pci() in a way that the mvebu_pcie_of_match_table
matching does not trigger on chips on which we don't want it to.

     Arnd