[PATCH 08/18] arm64: dts: m3ulcb: enable SCIF clk and pins
From: Simon Horman <hidden>
Date: 2016-11-21 12:05:37
Also in:
linux-renesas-soc
Subsystem:
arm/risc-v/renesas architecture, the rest · Maintainers:
Geert Uytterhoeven, Magnus Damm, Linus Torvalds
From: Vladimir Barinov <redacted> This enables the external crystal for the SCIF_CLK and its pinctrl, to be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Vladimir Barinov <redacted> Signed-off-by: Simon Horman <redacted> --- arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index 1ae0708bb495..96cda59c2698 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts@@ -37,10 +37,18 @@ }; &pfc { + pinctrl-0 = <&scif_clk_pins>; + pinctrl-names = "default"; + scif2_pins: scif2 { groups = "scif2_data_a"; function = "scif2"; }; + + scif_clk_pins: scif_clk { + groups = "scif_clk_a"; + function = "scif_clk"; + }; }; &scif2 {
@@ -49,3 +57,8 @@ status = "okay"; }; + +&scif_clk { + clock-frequency = <14745600>; + status = "okay"; +};
--
2.7.0.rc3.207.g0ac5344