On Sun, Nov 13, 2016 at 11:01:27PM +0800, Chen-Yu Tsai wrote:

quoted

                        compatible = "allwinner,sun5i-a13-tcon";
                        reg = <0x01c0c000 0x1000>;
                        interrupts = <44>;
-                       resets = <&tcon_ch0_clk 1>;
+                       resets = <&ccu RST_LCD>;
                        reset-names = "lcd";
-                       clocks = <&ahb_gates 36>,
-                                <&tcon_ch0_clk>,
-                                <&tcon_ch1_clk>;
+                       clocks = <&ccu CLK_AHB_LCD>,
+                                <&ccu CLK_TCON_CH0>,
+                                <&ccu CLK_TCON_CH1>;

Just curious, is CLK_TCON_CH1_SCLK ever used?

Yes, this is an intermediate clock for the channel 1 clock.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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