Thread (20 messages) 20 messages, 5 authors, 2016-11-01
STALE3501d REVIEWED: 1 (0M)
Revisions (9)
  1. v1 current
  2. v1 [diff vs current]
  3. v1 [diff vs current]
  4. v1 [diff vs current]
  5. v1 [diff vs current]
  6. v1 [diff vs current]
  7. v1 [diff vs current]
  8. v1 [diff vs current]
  9. v3 [diff vs current]

[PATCH 0/3] Support userspace irqchip with arch timers

From: Alexander Graf <hidden>
Date: 2016-09-29 15:11:36
Also in: kvm, kvmarm

On 09/27/2016 09:08 PM, Christoffer Dall wrote:
Hi Alex,

Marc and I have been looking at this during Linaro connect and have
slightly reworked your patch into this small series.

It would be good if you could have a look at it and test it out.
Tested-by: Alexander Graf <redacted>

Works fine so far :).
I've tested it with your QEMU, and it works for UP, but secondary CPUs
fail to come up, and it looks like the kernel never gets an IPI for
those CPUs from userspace.  Any chance you're willing to take a look at
that?
I can try, but not very soon. I doubt it's something fundamental - we 
probably just don't synchronize kvm/qemu state properly on IPIs (read: a 
QEMU bug).
Also, let me know if the split of your patch with preserving your
authorship is ok with you.
Works for me :)


Alex
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help