Thread (30 messages) 30 messages, 2 authors, 2016-07-26

[PATCH v11 10/10] genirq/msi: use the MSI doorbell's IOVA when requested

From: eric.auger@redhat.com (Auger Eric)
Date: 2016-07-26 10:02:39
Also in: kvm, kvmarm, linux-iommu, lkml

Hi Thomas,

On 26/07/2016 11:04, Thomas Gleixner wrote:
Eric,

On Mon, 25 Jul 2016, Auger Eric wrote:
quoted
On 20/07/2016 11:09, Thomas Gleixner wrote:
quoted
On Tue, 19 Jul 2016, Eric Auger wrote:
quoted
@@ -63,10 +63,18 @@ static int msi_compose(struct irq_data *irq_data,
 {
 	int ret = 0;
 
-	if (erase)
+	if (erase) {
 		memset(msg, 0, sizeof(*msg));
-	else
+	} else {
+		struct device *dev;
+
 		ret = irq_chip_compose_msi_msg(irq_data, msg);
+		if (ret)
+			return ret;
+
+		dev = msi_desc_to_dev(irq_data_get_msi_desc(irq_data));
+		WARN_ON(iommu_msi_msg_pa_to_va(dev, msg));
What the heck is this call doing? And why is there only a WARN_ON and not a
proper error return code handling?
iommu_msi_msg_pa_to_va is part of the new iommu-msi API introduced in PART I
of this series. This helper function detects the physical address found in
the MSI message has a corresponding allocated IOVA. This happens if the MSI
doorbell is accessed through an IOMMU and this IOMMU do not bypass the MSI
addresses (ARM case). Allocation of this IOVA was performed in the previous
patch.

So, if this is the case, the physical address is swapped with the IOVA
address. That way the PCIe device will send the MSI with this IOVA and
the address will be translated by the IOMMU into the target MSI doorbell PA.

Hope this clarifies
No, it does not. You are explaining in great length what that function is
doing, but you are not explaining WHY your don't do a proper return code
handling and just do a WARN_ON() and happily proceed. If that function fails
then the interrupt will not be functional, so WHY on earth are you continuing?
Oh sorry I focused on the function's goal. Originally I could not return an
error since there is a BUG_ON(ret) afterwards. And typically the userspace can
willingly omit to pass IPA range that map MSIs. But now we have this 2 phases where
we first map the MSIs on pci_enable_msi_range and use the IOVA at compose time
I need to analyze again if the userspace can induce a BUG_ON.

Thanks

Eric
Thanks,

	tglx
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