[PATCH v3 2/2] clk: samsung: exynos7: Add clocks for atlas block
From: Abhilash Kesavan <hidden>
Date: 2016-07-11 14:43:59
Also in:
linux-clk, linux-samsung-soc, lkml
From: Abhilash Kesavan <hidden>
Date: 2016-07-11 14:43:59
Also in:
linux-clk, linux-samsung-soc, lkml
Hi Sylwester, Thanks for the review. On Thu, Jul 7, 2016 at 12:26 PM, Sylwester Nawrocki [off-list ref] wrote:
On 07/05/2016 10:29 PM, Abhilash Kesavan wrote:quoted
+static const struct samsung_pll_rate_table pll1450x_24mhz_tbl[] = { + /* rate, m, p, s */ + PLL_35XX_RATE(2496000000, 208, 2, 0),Please add U postfix to these constants to address compiler warning as reported by kbuild-all at 01.org:
I'll fix the warning.
quoted
quoted
drivers/clk/samsung/clk-exynos7.c:43:2: warning: this decimal constant isunsigned only in ISO C90 PLL_35XX_RATE(2496000000, 208, 2, 0), ^~~~~~~~~~~~~quoted
+static void __init exynos7_clk_atlas_init(struct device_node *np) +{ + void __iomem *reg_base; + struct samsung_clk_provider *ctx; + + reg_base = of_iomap(np, 0); + if (!reg_base) { + panic("%s: failed to map registers\n", __func__); + return; + } + + ctx = samsung_clk_init(np, reg_base, ATLAS_NR_CLK); + if (!ctx) { + panic("%s: unable to allocate ctx\n", __func__);You can remove this panic() call, there is already one inside samsung_clk_init().
Will remove it. Thanks, Abhilash